1. Field of the Invention:
This invention relates to a semiconductor memory device, and more particularly to a semiconductor memory device having a volatile memory means and a non-volatile memory means. This invention also relates to data rewrite and data recall methods performed in the semiconductor memory device.
2. Description of the Prior Art
Semiconductor memory devices of the prior art include a mask ROM (Read-Only Memory), an EEPROM (Electrically Erasable Programmable Read-Only Memory) and other types of non-volatile memory devices which retain their storage contents even when the power is off, and a DRAM (Dynamic Random-Access Memory) and other volatile memory devices which lose their storage contents when the power is off.
Non-volatile memory devices, a mask ROM and EEPROM are capable of retaining stored data for a long period of time after the power is cut off. However, in the case of a mask ROM, data cannot be rewritten after it has been written in a wafer process. In the case of an EEPROM, data can be rewritten after it has been arranged in an apparatus, but the period for data write/erase is as long as 10 ms and there is a limit to the number of possible write/erase cycles, so these devices are not suitable to applications in which data is repeatedly rewritten.
In a volatile memory, a DRAM, on the other hand, the period for data write is less than 100 ns and there is no limit to the number of rewrite cycles, but when the power is off, stored data are lost.
FIG. 28 shows a conventional semiconductor memory device having a memory cell in which a DRAM section and an EEPROM section EM are combined. In the device shown in FIG. 28, the memory cell is connected to a pair of bit lines (a control gate line CG and a bit line B) with the result in that a increased area is required. Because the source of a MOS transistor Tr.sub.14 is connected to Vcc, the operation of reading the threshold voltage Vth (low state) of the EEPROM section EM requires a considerably prolonged period of time, and the potential difference between the bit lines is small.